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| a FEATURES Low Cost Three Video Amplifiers in One Package Optimized for Driving Cables in Video Systems Excellent Video Specifications (RL = 150 ) Gain Flatness 0.1 dB to 50 MHz 0.03% Differential Gain Error 0.06 Differential Phase Error Low Power Operates on Single +3 V to 15 V Power Supplies 5.5 mA/Amplifier Max Power Supply Current High Speed 125 MHz Unity Gain Bandwidth (-3 dB) 500 V/ s Slew Rate High Speed Disable Function per Channel Turn-Off Time 80 ns Easy to Use 50 mA Output Current Output Swing to 1 V of Rails APPLICATIONS Video Line Driver LCD Drivers Computer Video Plug-In Boards Ultrasound RGB Amplifier CCD Based Systems Single Supply, Low Power Triple Video Amplifier AD813 PIN CONFIGURATION 14-Lead DIP and SOIC DISABLE1 1 DISABLE2 DISABLE3 2 3 14 OUT2 13 -IN2 12 +IN2 VS+ 4 +IN1 5 -IN1 6 OUT1 7 AD813 11 VS- 10 +IN3 9 8 -IN3 OUT3 50 MHz while offering differential gain and phase error of 0.03% and 0.06. This makes the AD813 ideal for broadcast and consumer video electronics. The AD813 offers low power of 5.5 mA per amplifier max and runs on a single +3 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals. While operating on a single +5 V supply the AD813 still achieves 0.1 dB flatness to 20 MHz and 0.05% & 0.05 of differential gain and phase performance. All this is offered in a small 14-lead plastic DIP or SOIC package. These features make this triple amplifier ideal for portable and battery powered applications where size and power are critical. The outstanding bandwidth of 125 MHz along with 500 V/s of slew rate make the AD813 useful in many general purpose, high speed applications where a single +3 V or dual power supplies up to 15 V are needed. Furthermore the AD813 contains a high speed disable function for each amplifier in order to power down the amplifier or high impedance the output. This can then be used in video multiplexing applications. The AD813 is available in the industrial temperature range of -40C to +85C in plastic DIP and SOIC packages as well as chips. 500mV 500ns PRODUCT DESCRIPTION The AD813 is a low power, single supply triple video amplifier. Each of the three current feedback amplifiers has 50 mA of output current, and is optimized for driving one back-terminated video load (150 ). The AD813 features gain flatness of 0.1 dB to G = +2 RL = 150 0.2 NORMALIZED GAIN - dB 15V 0.1 100 0 -0.1 5V -0.2 -0.3 -0.4 -0.5 3V 5V 90 10 0% 100k 1M 10M 100M 5V FREQUENCY - Hz Figure 1. Fine Scale Gain Flatness vs. Frequency, G = +2, RL = 150 Figure 2. Channel Switching Characteristics for a 3:1 Mux REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998 AD813-SPECIFICATIONS Dual Supply (@ T = +25 C, R = 150 A L , unless otherwise noted) Conditions VS 5 V 15 V 5 V 15 V 5 V 15 V 5 V 15 V 5 V 15 V 15 V 5 V, 15 V 5 V, 15 V 5 V, 15 V 5 V 15 V 5 V 15 V 5 V, 15 V TMIN-TMAX 5 V, 15 V 5 V, 15 V 5 V, 15 V 5 V 15 V 5 V 15 V 69 66 73 72 300 200 400 300 Min 45 75 15 25 150 AD813A Typ Max 65 100 25 50 150 250 225 450 50 40 -90 3.5 1.5 18 0.08 0.03 0.13 0.06 2 15 5 0.5 76 82 500 900 Units MHz MHz MHz MHz V/s V/s V/s V/s ns ns dBc nVHz pAHz pAHz % % Degrees Degrees mV mV V/C A A A A dB dB dB dB k k k k M pF V V dB A/V A/V dB A/V A/V Model DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate1 G = +2, No Peaking G = +2 G = +2, RL = 1 k G = -1, RL = 1 k Settling Time to 0.1% G = -1, RL = 1 k VO = 3 V Step VO = 10 V Step fC = 1 MHz, RL = 1 k f = 10 kHz f = 10 kHz, +In -In NTSC, G = 2, RL = 150 NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Offset Drift -Input Bias Current 0.09 0.12 5 12 30 35 1.7 2.5 TMIN-TMAX +Input Bias Current Open-Loop Voltage Gain TMIN-TMAX VO = 2.5 V, RL = 150 TMIN-TMAX VO = 10 V, RL = 1 k TMIN-TMAX VO = 2.5 V, RL = 150 TMIN-TMAX VO = 10 V, RL = 1 k TMIN-TMAX +Input -Input +Input Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage -Input Current Input Current Input Offset Voltage -Input Current +Input Current 15 V 15 V 15 V 5 V 15 V 5 V 15 V 54 15 65 1.7 4.0 13.5 58 2 0.07 62 1.5 0.05 VCM = 2.5 V VCM = 10 V 3 0.15 3.0 0.1 57 -2- REV. B AD813 Model Conditions OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short Circuit Current MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input Offset Voltage -Input Bias Current POWER SUPPLY Operating Range Quiescent Current G = +2, RF = 715 VIN = 2 V RL = 150 , TMIN-TMAX RL = 1 k, TMIN-TMAX VS 5 V 15 V 5 V 15 V 15 V Min 3.5 13.6 25 30 AD813A Typ 3.8 14.0 40 50 100 Max Units V V mA mA mA G = +2, f = 5 MHz G = +2, f = 40 MHz TMIN-TMAX TMIN-TMAX 5 V, 15 V 15 V 5 V, 15 V 5 V, 15 V 1.2 -65 0.1 0.5 2 3.5 25 18 4.0 5.5 6.7 0.65 1.0 dB dB mV A V mA mA mA mA mA dB A/V A/V dB pF dB ns ns Per Amplifier TMIN-TMAX Per Amplifier VS = 1.5 V to 15 V Quiescent Current, Powered Down Power Supply Rejection Ratio Input Offset Voltage -Input Current +Input Current DISABLE CHARACTERISTICS Off Isolation Off Output Impedance Channel-to-Channel Isolation Turn-On Time Turn-Off Time 5 V 15 V 15 V 5 V 15 V 3.5 4.5 0.5 0.75 72 80 0.3 0.005 -57 12.5 -65 100 80 0.8 0.05 f = 5 MHz G = +1 2 or 3 Channels Mux, f = 5 MHz 5 V, 15 V 5 V, 15 V 5 V, 15 V 5 V, 15 V NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. Specifications subject to change without notice. REV. B -3- AD813-SPECIFICATIONS Single Supply (@ T = +25 C, R = 150 A L , unless otherwise noted) Conditions VS +5 V +3 V +5 V +3 V +5 V +3 V +5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V +3 V +5 V +3 V +5 V, +3 V TMIN-TMAX +5 V, +3 V +5 V, +3 V TMIN-TMAX +5 V, +3 V TMIN-TMAX VO = +2.5 V p-p VO = +0.7 V p-p VO = +3 V p-p VO = +1 V p-p +Input -Input +Input +5 V +3 V +5 V +3 V +5 V, +3 V +5 V +5 V +3 V VCM = 1.25 V to 3.75 V +5 V 1.0 1.0 54 58 3 0.1 56 3.5 0.1 3.2 1.3 30 25 40 65 180 Min 35 25 12 8 AD813A Typ Max 50 40 20 15 100 50 3.5 1.5 18 0.05 0.2 0.05 0.2 1.5 7 7 0.5 70 69 300 225 15 90 2 4.0 2.0 5 10 30 40 1.7 2.5 Units MHz MHz MHz MHz V/s V/s nVHz pAHz pAHz % % Degrees Degrees mV mV V/C A A A A dB dB k k M pF V V dB A/V A/V dB A/V A/V V p-p V p-p mA mA mA Model DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate1 NOISE/HARMONIC PERFORMANCE Input Voltage Noise Input Current Noise Differential Gain Error2 Differential Phase Error2 DC PERFORMANCE Input Offset Voltage Offset Drift -Input Bias Current +Input Bias Current Open-Loop Voltage Gain Open-Loop Transresistance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage -Input Current +Input Current Input Offset Voltage -Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing p-p Output Current Short Circuit Current G = +2, RF = 715 VIN = 1 V G = +2, No Peaking G = +2 G = +2, RL = 1 k f = 10 kHz f = 10 kHz, +In -In NTSC, G = +2, RL = 150 G = +1 G = +2 G = +1 6.5 0.2 VCM = 1 V to 2 V +3 V RL = 150 , TMIN-TMAX +5 V +3 V +5 V +3 V +5 V 3.0 1.0 20 15 -4- REV. B AD813 Model Conditions MATCHING CHARACTERISTICS Dynamic Crosstalk Gain Flatness Match DC Input Offset Voltage -Input Bias Current POWER SUPPLY Operating Range Quiescent Current VS Min AD813A Typ Max Units G = +2, f = 5 MHz G = +2, f = 20 MHz TMIN-TMAX TMIN-TMAX +5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V, +3 V 2.4 -65 0.1 0.5 2 3.5 25 36 4.0 4.0 5.0 0.6 0.5 dB dB mV A V mA mA mA mA mA dB A/V A/V dB pF dB ns ns Per Amplifier TMIN-TMAX Per Amplifier Quiescent Current, Powered Down Power Supply Rejection Ratio Input Offset Voltage -Input Current +Input Current DISABLE CHARACTERISTICS Off Isolation Off Output Impedance Channel-to-Channel Isolation Turn-On Time Turn-Off Time TRANSISTOR COUNT +5 V +3 V +5 V +5 V +3 V 3.2 3.0 0.4 0.4 76 0.3 0.005 VS = +3.0 V to +30 V f = 5 MHz G = +1 2 or 3 Channel Mux, f = 5 MHz +5 V, +3 V +5 V, +3 V +5 V, +3 V +5 V, +3 V -55 13 -65 100 80 111 NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2 Single supply differential gain and phase are measured with the ac coupled circuit of Figure 52. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . -65C to +125C Operating Temperature Range AD813A . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 14-Lead Plastic DIP Package: JA = 75C/W 14-Lead SOIC Package: JA = 120C/W ORDERING GUIDE Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description Package Options Model AD813AN AD813AR-14 AD813ACHIPS AD813AR-REEL AD813AR-REEL7 5962-9559601M2A* 14-Lead Plastic DIP N-14 14-Lead Plastic SOIC R-14 Die Form 13" REEL 7" REEL -55C to +125C 20-Lead LCC *Refer to official DSCC drawing for tested specifications and pin configuration. REV. B -5- AD813 Maximum Power Dissipation MAXIMUM POWER DISSIPATION - Watts 2.5 TJ = +150 C The maximum power that can be safely dissipated by the AD813 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. While the AD813 is internally short circuit protected, this may not be enough to guarantee that the maximum junction temperature (150C) is not exceeded under all conditions. To ensure proper operation, it is important to observe the derating curves. It must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. 2.0 14-LEAD DIP PACKAGE 1.5 14-LEAD SOIC 1.0 0.5 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C 70 80 90 Figure 3. Maximum Power Dissipation vs. Ambient Temperature METALIZATION PHOTO Dimensions shown in inches and (mm). 0.124 (3.15) +IN2 12 VS- 11 VS- 11 VS- 11 +IN3 10 9 -IN3 -IN2 13 8 OUT3 OUT2 14 0.057 (1.45) DISABLE1 1 DISABLE2 2 3 DISABLE3 4 VS+ 5 +IN1 6 -IN1 7 OUT1 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD813 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -6- REV. B AD813 20 Volts 20 18 COMMON-MODE VOLTAGE RANGE - 15 SUPPLY CURRENT - mA 16 VS = 15V 10 14 VS = 12 5V 5 10 0 0 5 10 SUPPLY VOLTAGE - 15 Volts 20 8 -60 -40 -20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE - C Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage Figure 7. Supply Current vs. Junction Temperature 20 13 TA = +25 C 12 OUTPUT VOLTAGE - V p-p NO LOAD SUPPLY CURRENT - mA 15 11 10 RL = 150 10 5 9 0 0 5 10 SUPPLY VOLTAGE - 15 Volts 20 8 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE - Volts Figure 5. Output Voltage Swing vs. Supply Voltage Figure 8 Supply Current vs. Supply Voltage at Low Voltages 30 15V SUPPLY 25 INPUT BIAS CURRENT - A 25 20 15 10 -IB, VS = 5 0 -5 -10 -15 -20 -IB, VS = 15V +IB, VS = 5V, 15V 5V OUTPUT VOLTAGE - V p-p 20 15 10 5V SUPPLY 5 0 10 100 1k 10k -25 -60 -40 -20 0 20 40 60 80 100 120 140 LOAD RESISTANCE - JUNCTION TEMPERATURE - C Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Input Bias Current vs. Junction Temperature REV. B -7- AD813 4 2 INPUT OFFSET VOLTAGE - mV 0 -2 -4 -6 -8 -10 -12 -14 -16 -60 20 0 5 10 SUPPLY VOLTAGE - Volts 15 20 70 VS = 5V 60 OUTPUT CURRENT - mA 100 120 140 50 VS = 15V 40 30 -40 -20 0 20 40 60 80 JUNCTION TEMPERATURE - C Figure 10. Input Offset Voltage vs. Junction Temperature Figure 13. Linear Output Current vs. Supply Voltage 160 VS = SHORT CIRCUIT CURRENT - mA 140 SINK 120 15V CLOSED-LOOP OUTPUT RESISTANCE - 1k G = +2 100 10 100 SOURCE 80 1 5VS 0.1 15VS 0.01 10k 60 40 -60 -40 -20 0 20 40 60 80 100 120 140 100k JUNCTION TEMPERATURE - C 1M FREQUENCY - Hz 10M 100M Figure 11. Short Circuit Current vs. Junction Temperature Figure 14. Closed-Loop Output Resistance vs. Frequency 80 1M 70 OUTPUT CURRENT - mA 100k 60 50 VS = 40 VS = 30 15V 5V OUTPUT RESISTANCE - 10k 1k 20 -60 -40 -20 0 20 40 60 80 100 120 140 100 100k 1M 10M 100M JUNCTION TEMPERATURE - C FREQUENCY - Hz Figure 12. Linear Output Current vs. Junction Temperature Figure 15. Output Resistance vs. Frequency, Disabled State -8- REV. B AD813 100 100 120 PHASE VS = 15V 0 -45 -90 PHASE - Degrees VOLTAGE NOISE - nV/ Hz CURRENT NOISE - pA/ Hz TRANSIMPEDANCE - dB INVERTING INPUT CURRENT NOISE 100 GAIN VS = 3V -135 -180 10 10 80 VS = 3V 60 VS = 15V VOLTAGE NOISE NONINVERTING INPUT CURRENT NOISE 1 100k 1 10 100 1k FREQUENCY - Hz 10k 40 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 16. Input Current and Voltage Noise vs. Frequency Figure 19. Open-Loop Transimpedance vs. Frequency (Relative to 1 ) 90 681 80 COMMON-MODE REJECTION - dB -30 681 HARMONIC DISTORTION - dBc VIN 70 681 60 50 40 30 20 10 10k VS = 3V VS = 681 VOUT -50 G = +2 VO = 2V p-p VS = 15V: RL = 1k VS = 5V: RL = 150 -70 2ND HARMONIC VS = 5V -90 3RD HARMONIC VS = 5V VS = 15V 15V -110 2ND 3RD -130 100k 1M FREQUENCY - Hz 10M 100M 1k 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 17. Common-Mode Rejection vs. Frequency Figure 20. Harmonic Distortion vs. Frequency 80 70 POWER SUPPLY REJECTION - dB 10 8 GAIN = -1 VS = 15V 15V 60 50 40 30 20 10 0 10k 1.5V V TO 0 OUTPUT SWING FROM 6 4 2 0 -2 -4 -6 -8 1% 0.1% 0.025% -10 100k 1M FREQUENCY - Hz 10M 100M 20 40 60 SETTLING TIME - ns 80 Figure 18. Power Supply Rejection vs. Frequency Figure 21. Output Swing and Error vs. Settling Time REV. B -9- AD813 1000 900 800 SLEW RATE - V/ s SLEW RATE - V/ s 700 VS = 15V RL = 500 600 500 G = +10 700 600 500 400 300 200 100 0 0 1 2 3 4 5 6 7 8 9 10 OUTPUT STEP SIZE - V p-p G = +2 G = +10 G = -1 400 300 G = -1 200 100 G = +2 G = +1 0 0 1.5 3.0 4.5 6.0 7.5 9.0 G = +1 10.5 Volts 12.0 13.5 15.0 SUPPLY VOLTAGE - Figure 22. Slew Rate vs. Output Step Size Figure 25. Maximum Slew Rate vs. Supply Voltage 2V 100 90 50ns VIN 1 00 90 500m V 20n s VIN 10 0% VOUT 10 VOUT 0% 2V 500m V Figure 23. Large Signal Pulse Response, Gain = +1, (RF = 750 , RL = 150 , VS = 5 V) Figure 26. Small Signal Pulse Response, Gain = +1, (RF = 750 , RL = 150 , VS = 5 V) PHASE SHIFT - Degrees +90 PHASE VS = 3V +1 5V 15V 5V 0 -90 -180 GAIN VS = 3V 5V 5V 15V -270 RL = 150 140 120 100 80 60 RF = 1k 40 RF = 750 RF = 866 CLOSED-LOOP GAIN - dB 0 -1 -2 -3 -4 -5 -6 1 -3dB BANDWIDTH - MHz 10 100 1000 2 4 FREQUENCY - MHz 6 8 10 12 SUPPLY VOLTAGE - Volts 14 16 Figure 24. Closed-Loop Gain and Phase vs. Frequency, G = +1 Figure 27. -3 dB Bandwidth vs. Supply Voltage, G = +1 -10- REV. B AD813 500mV 100 90 50ns 100 50mV 20ns VIN 90 VIN 10 0% VOUT 10 0% VOUT 500mV 500mV Figure 28. Large Signal Pulse Response, Gain = +10, (RF = 357 , RL = 500 , VS = 15 V) Figure 31. Small Signal Pulse Response, Gain = +10, (RF = 357 , RL = 150 , VS = 5 V) PHASE SHIFT - Degrees PHASE VS = 15V 5V G = +10 RL = 150 0 -90 -180 PHASE CLOSED-LOOP GAIN (NORMALIZED) - dB VS = 15V 5V G = +10 RL = 1k 0 -90 -180 -270 CLOSED-LOOP GAIN (NORMALIZED) - dB +1 0 -1 -2 -3 -4 -5 -6 1 10 GAIN 5V 3V 3V +1 0 -1 -2 -3 -4 -5 -6 1 5V GAIN 5V -270 VS = 5V 15V VS = 15V -360 3V 5V 3V 5V 100 1000 FREQUENCY - MHz 10 100 FREQUENCY - MHz 1000 Figure 29. Closed-Loop Gain and Phase vs. Frequency, G = +10, RL = 150 Figure 32. Closed-Loop Gain and Phase vs. Frequency, G = +10, RL = 1 k G = +10 RL = 150 80 -3dB BANDWIDTH - MHz 70 PEAKING 60 50 40 30 20 RF = 154 RF = 649 1dB -3dB BANDWIDTH - MHz 90 G = +10 RL = 1k RF = 357 RF = 357 80 70 60 50 40 30 20 RF = 154 RF = 649 2 4 6 8 10 12 14 Volts 16 2 4 6 8 10 12 14 Volts 16 SUPPLY VOLTAGE - SUPPLY VOLTAGE - Figure 30. -3 dB Bandwidth vs. Supply Voltage, G = +10, RL = 150 Figure 33. -3 dB Bandwidth vs. Supply Voltage, G = +10, RL = 1 k REV. B -11- PHASE SHIFT - Degrees AD813 2V 100 90 50ns 10 0 90 500m V 2 0n s 10 0% 10 0% 2V 500m V Figure 34. Large Signal Pulse Response, Gain = -1, (RF = 750 , RL = 150 , VS = 5 V) Figure 37. Small Signal Pulse Response, Gain = -1, (RF = 750 , RL = 150 , VS = 5 V) PHASE SHIFT - Degrees PHASE VS = 15V 5V G = -1 RL = 150 0 -90 -180 -270 PHASE VS = 15V 5V G = -10 RL = 1k 0 -90 -180 -270 3V +1 5V GAIN VS = 3V 5V -3 5V -4 -5 -6 1 10 100 FREQUENCY - MHz 15V CLOSED-LOOP GAIN (NORMALIZED) - dB 3V +1 0 -1 VS = -2 -3 -4 5V -5 -6 1 10 100 FREQUENCY - MHz 1000 3V 5V 15V GAIN 5V CLOSED-LOOP GAIN - dB 0 -1 -2 1000 Figure 35. Closed-Loop Gain and Phase vs. Frequency, G = -1, RL = 150 Figure 38. Closed-Loop Gain and Phase vs. Frequency, G = -10, RL = 1 k G = -1 RL = 150 110 -3dB BANDWIDTH - MHz 100 90 80 70 60 50 40 PEAKING RF = 715 0.2dB -3dB BANDWIDTH - MHz PEAKING RF = 681 1.0dB 80 70 60 RF = 154 50 40 30 20 RF = 649 RF = 357 G = -10 RL = 1k 2 4 6 8 10 12 14 Volts 16 2 4 6 8 10 12 14 Volts 16 SUPPLY VOLTAGE - SUPPLY VOLTAGE - Figure 36. -3 dB Bandwidth vs. Supply Voltage, G = -1, RL = 150 Figure 39. -3 dB Bandwidth vs. Supply Voltage, G = -10, RL = 1 k -12- REV. B PHASE SHIFT - Degrees AD813 General Consideration The AD813 is a wide bandwidth, triple video amplifier that offers a high level of performance on less than 5.5 mA per amplifier of quiescent supply current. With its fast acting power down switch, it is designed to offer outstanding functionality and performance at closed-loop inverting or noninverting gains of one or greater. Built on a low cost, complementary bipolar process, and achieving bandwidth in excess of 100 MHz, differential gain and phase errors of better than 0.1% and 0.1 (into 150 ), and output current greater than 40 mA, the AD813 is an exceptionally efficient video amplifier. Using a conventional current feedback architecture, its high performance is achieved through careful attention to design details. Choice of Feedback & Gain Resistors To estimate the -3 dB bandwidth for closed-loop gains or feedback resistors not listed in the above table, the following two pole model for the AD813 may be used: ACL = G (RF + Gr IN)CT + S (R + Gr ) C + 1 S F IN T 2 f2 2 where: ACL = G= rIN = CT = RF RG f2 s = = = = Because it is a current feedback amplifier, the closed-loop bandwidth of the AD813 depends on the value of the feedback resistor. The bandwidth also depends on the supply voltage. In addition, attenuation of the open-loop response when driving load resistors less than about 250 will also affect the bandwidth. Table I contains data showing typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 . (Bandwidths will be about 20% greater for load resistances above a few hundred ohms.) Table I. -3 dB Bandwidth vs. Closed-Loop Gain and Feedback Resistor , (RL = 150 ) VS (V) 15 Gain +1 +2 +10 -1 -10 +1 +2 +10 -1 -10 +1 +2 +10 -1 -10 +1 +2 +10 -1 -10 RF ( ) 866 681 357 681 357 750 649 154 649 154 715 619 154 619 154 681 619 154 619 154 BW (MHz) 125 100 60 100 55 75 65 40 70 40 60 50 30 50 30 50 40 25 40 20 closed-loop gain from "transcapacitance" 1 + RF/RG input resistance of the inverting input "transcapacitance," which forms the open-loop dominant pole with the transresistance feedback resistor gain resistor frequency of second (nondominant) pole 2 j f Appropriate values for the model parameters at different supply voltages are listed in Table II. Reasonable approximations for these values at supply voltages not found in the table can be obtained by a simple linear interpolation between those tabulated values which `bracket' the desired condition. Table II. Two Pole Model Parameters at Various Supplies VS (V) 15 5 +5 +3 rIN ( ) 85 90 105 115 CT (pF) 2.5 3.8 4.8 5.5 f2 (MHz) 150 125 105 95 As discussed in many amplifier and electronics textbooks (such as Roberge's Operational Amplifiers: Theory and Practice), the -3 dB bandwidth for the 2-pole model can be obtained as: f 3 = f n 1 - 2d 2 + (2 - 4d 2 + 4d 4 )1/2 fn = 5 [ ] 1/2 where: f2 ( R F + Gr IN ) C T 1/2 +5 and: d= 1 f 2 (R F +Gr IN ) C T 2 [ ]1/2 +3 This model will predict -3 dB bandwidth within about 10% to 15% of the correct value when the load is 150 . However, it is not accurate enough to predict either the phase behavior or the frequency response peaking of the AD813. The choice of feedback resistor is not critical unless it is important to maintain the widest, flattest frequency response. The resistors recommended in the table are those (metal film values) that will result in the widest 0.1 dB bandwidth. In those applications where the best control of the bandwidth is desired, 1% metal film resistors are adequate. Wider bandwidths can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. REV. B -13- AD813 Printed Circuit Board Layout Guidelines As with all wideband amplifiers, printed circuit board parasitics can affect the overall closed-loop performance. Most important for controlling the 0.1 dB bandwidth are stray capacitances at the output and inverting input nodes. Increasing the space between signal lines and ground plane will minimize the coupling. Also, signal lines connecting the feedback and gain resistors should be kept short enough that their associated inductance does not cause high frequency gain errors. Power Supply Bypassing A carefully laid-out PC board should be able to achieve the level of crosstalk shown in the figure. The most significant contributors to difficulty in achieving low crosstalk are inadequate power supply bypassing, overlapped input and/or output signal paths, and capacitive coupling between critical nodes. The bypass capacitors must be connected to the ground plane at a point close to and between the ground reference points for the loads. (The bypass of the negative power supply is particularly important in this regard.) This requires careful planning as there are three amplifiers in the package, and low impedance signal return paths must be provided for each load. (Using a parallel combination of 1 F, 0.1 F, and 0.01 F bypass capacitors will help to achieve optimal crosstalk.) The input and output signal return paths (to the bypass caps) must also be kept from overlapping. Since ground connections are not of perfectly zero impedance, current in one ground return path can produce a voltage drop in another ground return path if they are allowed to overlap. Electric field coupling external to (and across) the package can be reduced by arranging for a narrow strip of ground plane to be run between the pins (parallel to the pin rows). Doing this on both sides of the board can reduce the high frequency crosstalk by about 5 dB or 6 dB. Driving Capacitive Loads Adequate power supply bypassing can be very important when optimizing the performance of high speed circuits. Inductance in the supply leads can (for example) contribute to resonant circuits that produce peaking in the amplifier's response. In addition, if large current transients must be delivered to a load, then large (greater than 1 F) bypass capacitors are required to produce the best settling time and lowest distortion. Although 0.1 F capacitors may be adequate in some applications, more elaborate bypassing is required in other cases. When multiple bypass capacitors are connected in parallel, it is important to be sure that the capacitors themselves do not form resonant circuits. A small (say 5 ) resistor may be required in series with one of the capacitors to minimize this possibility. As discussed below, power supply bypassing can have a significant impact on crosstalk performance. Achieving Low Crosstalk Measured crosstalk from the output of Amplifier 2 to the input of Amplifier 1 of the AD813 is shown in Figure 40. All other crosstalk combinations, (from the output of one amplifier to the input of another), are a few dB better than this due to the additional distance between critical signal nodes. -10 -20 -30 RL = 150 When used with the appropriate output series resistor, any load capacitance can be driven without peaking or oscillation. In most cases, less than 50 is all that is needed to achieve an extremely flat frequency response. As illustrated in Figure 44, the AD813 can be very attractive for driving large capacitive loads. In this case, the AD813's high output short circuit current allows for a 150 V/s slew rate when driving a 510 pF capacitor. RF +VS -40 CROSSTALK - dB 0.1 F -50 -60 -70 -80 -90 1.0 F RG 4 RS VO 1.0 F CL RL AD813 VIN RT 0.1 F -VS 11 -100 -110 100k 1M 10M FREQUENCY - Hz 100M Figure 41. Circuit for Driving a Capacitive Load Figure 40. Worst Case Crosstalk vs. Frequency -14- REV. B AD813 VS = 5V G = +2 RF = 750 RL = 1k CL = 10pF CLOSED-LOOP GAIN - dB 9 6 3 0 -3 RS = 50 RS = 30 RS = 0 Overload Recovery There are three important overload conditions to consider. They are due to: input common-mode voltage overdrive, output voltage overdrive, and input current overdrive. When the amplifier is configured for low closed-loop gains, and the input common-mode voltage range is exceeded, the recovery time will be very fast, typically under 30 ns. When configured for a higher gain, and overloaded at the output, the recovery time will also be short. For example, in a gain of +10, with 6 dB of input overdrive, the recovery time of the AD813 is about 25 ns (see Figure 45). 1V 50ns 1 10 100 FREQUENCY - MHz 1000 100 90 Figure 42. Response to a Small Load Capacitor at VS = 5 V VS = 15V G = +2 RF = 750 RL = 1k CLOSED-LOOP GAIN - dB 10 0% 2V 9 6 3 0 CL = 510pF, RS = 15 -3 CL = 150pF, RS = 30 Figure 45. 6 dB Overload Recovery, G = +10, (RL = 500 , RF = 357 , VS = 5 V) 1 In the case of high gains with very high levels of input overdrive, a longer recovery time will occur. For example, if the input common-mode voltage range is exceeded in the gain of +10, the recovery time will be on the order of 100 ns. This is primarily due to current overloading of the input stage. 1000 10 100 FREQUENCY - MHz Figure 43. Response to a Large Load Capacitor at VS = 15 V As noted in the warning under Maximum Power Dissipation, a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. Though this current is internally limited to about 40 mA, its effect on the total power dissipation may be significant. 5V 100 90 1 00 n s 100 10 0% 5V Figure 44. Circuit of Figure 38 Driving a 510 pF Load Capacitor, VS = 15 V (RL = 1 k, RF = RG = 750 , RS =15 ) REV. B -15- AD813 High Performance Video Line Driver At a gain of +2, the AD813 makes an excellent driver for a back terminated 75 video line. Low differential gain and phase errors and wide 0.1 dB bandwidth can be realized over a wide range of power supply voltage. Excellent gain and group delay matching are also attainable over the full operating supply voltage range. RG +VS RF Figures 50 and 51 show the worst case matching; the match between amplifiers 2 and 3 is typically much better than this. G = +2 RL = 150 0.2 NORMALIZED GAIN - dB 15V 0.1 0 -0.1 5V -0.2 -0.3 -0.4 -0.5 3V 5V 0.1 F 4 75 CABLE VIN 75 75 75 CABLE VOUT 75 AD813 11 0.1 F 100k -VS 1M 10M 100M FREQUENCY - Hz Figure 46. A Video Line Driver Operating at a Gain of +2 (RF = RG from Table I) +90 PHASE CLOSED-LOOP GAIN (NORMALIZED) - dB PHASE SHIFT - Degrees Figure 49. Fine-Scale Gain (Normalized) vs. Frequency 2.5 2.0 1.5 GAIN MATCHING - dB G = +2 RL = 150 3V VS = 5V 15V 5V 0 -90 -180 -270 G = +2 RL = 150 +1 GAIN 0 -1 -2 -3 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 VS = 3V VS = 15V VS = 5V 15V 5V -4 -5 -6 1 10 100 1000 FREQUENCY - MHz 3V 1 10 100 FREQUENCY - MHz 1000 Figure 47. Closed-Loop Gain & Phase vs. Frequency for the Line Driver 120 110 100 RF = 590 RF = 681 Figure 50. Closed-Loop Gain Matching vs. Frequency 10 8 6 VS = 3V 5V 5V 15V DELAY -3dB BANDWIDTH - MHz GROUP DELAY - ns 90 80 70 60 50 40 30 20 0 2 4 6 8 10 12 14 RF = 750 4 2 NO PEAKING 1.0 0.5 0 -0.5 DELAY MATCHING -1.0 100k 3V VS = 15V 16 18 20 SUPPLY VOLTAGE - Volts 1M 10M FREQUENCY - Hz 100M Figure 48. -3 dB Bandwidth vs. Supply Voltage for Gain = +2, RL = 150 Figure 51. Group Delay and Group Delay Matching vs. Frequency, G = +2, RL = 150 -16- REV. B AD813 Operation Using a Single Supply Disable Mode Operation The AD813 will operate with total supply voltages from 36 V down to 2.4 V. With proper biasing (see Figure 52) it can make an outstanding single supply video amplifier. Since the input and output voltage ranges extend to within 1 V of the supply rails, it will handle a 1.3 V peak-to-peak signal on a single 3.3 V supply, or a 3 V peak-to-peak signal on a single 5 V supply. The small signal 0.1 dB bandwidths will exceed 10 MHz in either case, and the large signal bandwidths will exceed 6 MHz. The capacitively coupled cable driver in Figure 52 will achieve outstanding differential gain and phase errors of 0.05% and 0.05 degrees respectively on a single 5 V supply. Resistor R2, in this circuit, is selected to optimize the differential gain and phase by biasing the amplifier in its most linear region. 619 C3 30 F C2 1F R1 9k C1 2F VIN R2 12.4k R3 1k 619 Pulling the voltage on any one of the Disable pins about 2.5 V down from the positive supply will put the corresponding amplifier into a disabled, powered down, state. In this condition, the amplifier's quiescent supply current drops to about 0.5 mA, its output becomes a high impedance, and there is a high level of isolation from input to output. In the case of the gain of two line driver for example, the impedance at the output node will be about the same as for a 1.4 k resistor (the feedback plus gain resistors) in parallel with a 12.5 pF capacitor and the input to output isolation will be about 65 dB at 1 MHz. Leaving the Disable pin disconnected (floating) will leave the corresponding amplifier operational, in the enabled state. The input impedance of the disable pins is about 35 k in parallel with a few pF. When grounded, about 50 A flows out of a disable pin on 5 V supplies. Input voltages greater than about 1.5 V peak-to-peak will defeat the isolation. In addition, large signals (greater than 3 V peakto-peak) applied to the output node will cause the output impedance to drop significantly. +5V 4 COUT 47 F 75 75 CABLE VOUT 75 AD813 11 Figure 52. Biasing for Single Supply Operation PHASE SHIFT - Degrees PHASE 0.5 CLOSED-LOOP GAIN - dB VS = 5V G = +2 RF = 619 RL = 150 0 -90 -180 When the Disable pins are driven by complementary output CMOS logic (such as the 74HC04), the disable time is about 80 ns (until the output goes high impedance) and the enable time is about 100 ns (to low impedance output) on 15 V supplies. When operated on 15 V supplies, the disable pins should be driven by open drain logic. In this case, pull-up resistors from the disable pins to the plus supply will ensure minimum switching time. 464 590 +5V 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 1 10 100 GAIN -270 6 4 7 84 VIN1 75 5 1 SELECT1 464 590 1000 FREQUENCY - MHz Figure 53. Closed-Loop Gain and Phase vs. Frequency, Circuit of Figure 52 VIN2 13 14 12 2 84 75 CABLE VOUT 75 1V 100 90 50ns 75 VIN SELECT2 464 590 9 VOUT 10 0% 84 8 11 3 -5V VIN3 10 500mV SELECT3 75 Figure 54. Pulse Response for the Circuit of Figure 52 with +VS = 5 V Figure 55. A Fast Switching 3:1 Video Mux (Supply Bypassing Not Shown) REV. B -17- AD813 3:1 Video Multiplexer Single Supply Differential Line Driver Wiring the amplifier outputs together will form a 3:1 mux with outstanding gain flatness. Figure 55 shows a recommended configuration which results in -0.1 dB bandwidth of 20 MHz and OFF channel isolation of 60 dB at 10 MHz on 5 V supplies. The time to switch between channels is about 180 ns. Switching time is only slightly affected by signal level. 500mV 100 90 500ns Due to its outstanding overall performance on low supply voltages, the AD813 makes possible exceptional differential transmission on very low power. The circuit of Figure 59 will convert a single-ended, ground referenced signal to a differential signal whose common-mode reference is set to one half the supply voltage. This allows for a greater than 2 V peak-to-peak signal swing on a single 3 V power supply. A bandwidth over 30 MHz is achieved with 20 mA of output drive on only 30 mW of quiescent power (excluding load current). 715 1F 715 VOUT+ +3V RL1 4 2 10 0% +3V 715 1F 1k 715 715 9k 1F 5V VIN 1 715 715 Figure 56. Channel Switching Characteristic for the 3:1 Mux -10 1F 10k 3 -20 11 -30 FEEDTHROUGH - dB VOUT- RL2 -40 -50 -60 -70 -80 -90 -100 100 715 715 Figure 59. Single 3 V Supply Differential Line Driver with 2 V Swing 1V 50ns VIN -110 100k 90 1M 10M 100M FREQUENCY - Hz Figure 57. 3:1 Mux OFF Channel Feedthrough vs. Frequency PHASE SHIFT - Degrees 0 PHASE -45 -90 0.5 CLOSED-LOOP GAIN - dB 10 0% VOUT+ - VOUT- 1V -135 -180 GAIN 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 1 10 FREQUENCY - MHz 100 Figure 60. Differential Driver Pulse Response (VS = 3 V, RL1 = RL2 = 200 ) Figure 58. 3:1 Mux ON Channel Gain and Phase vs. Frequency -18- REV. B AD813 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Plastic DIP (N-14) C1860b-0-5/98 PRINTED IN U.S.A. 0.795 (20.19) 0.725 (18.42) 14 1 8 7 0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.100 0.070 (1.77) (2.54) 0.045 (1.15) BSC SEATING PLANE 0.015 (0.381) 0.008 (0.204) 14-Lead SOIC (R-14) 0.3444 (8.75) 0.3367 (8.55) 14 1 8 7 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) x 45 0.0099 (0.25) 0.0500 SEATING (1.27) PLANE BSC 0.0192 (0.49) 0.0138 (0.35) 0.0099 (0.25) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41) REV. B -19- |
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